X-Git-Url: https://defiant.homedns.org/gitweb/?p=ros_wild_thumper.git;a=blobdiff_plain;f=avr%2Fnano%2Fmain.c;h=935ce4994d4ae418a1333a13aa44045210e1518b;hp=0ca6e83313a173fc1d20a0526da6a28674b56588;hb=7e8cc0303c358a8882f5b9f12df4357b63429288;hpb=d63dbc679f47b3d479e6e46fea01e5ee04bbd7ca

diff --git a/avr/nano/main.c b/avr/nano/main.c
index 0ca6e83..935ce49 100644
--- a/avr/nano/main.c
+++ b/avr/nano/main.c
@@ -5,6 +5,10 @@
 #include <avr/interrupt.h>
 #include <avr/sleep.h>
 #include <util/delay.h>
+#include <util/twi.h>
+#include <avr/eeprom.h>
+#include <avr/wdt.h>
+#include <avr/pgmspace.h>
 #include "uart.h"
 
 /*
@@ -14,48 +18,91 @@
  * 0x02 Distance left LSB
  * 0x03 Distance right MSB
  * 0x04 Distance right LSB
- * 0x05 Distance forward MSB
- * 0x06 Distance forward LSB
+ * 0x05 Distance forward1 MSB
+ * 0x06 Distance forward1 LSB
  * 0x07 Distance backward MSB
  * 0x08 Distance backward LSB
  * 0x09 Voltage MSB
  * 0x0A Voltage LSB
+ * 0x0B Distance forward2 MSB
+ * 0x0C Distance forward2 LSB
+ * 0x0D Current MSB
+ * 0x0E Current LSB
+ *
+ * 0x15 Distance forward1 MSB (read only)
+ * 0x16 Distance forward1 LSB (read only)
+ * 0x17 Distance backward MSB (read only)
+ * 0x18 Distance backward LSB (read only)
+ * 0x19 Distance forward2 MSB (read only)
+ * 0x1A Distance forward2 LSB (read only)
  *
  * 0xff Bootloader
  */
 
 
-#define TWI_ACK		TWCR = (1<<TWEA) | (1<<TWINT) | (1<<TWEN) | (1<<TWIE)
-#define TWI_RESET	TWCR &= ~((1 << TWSTO) | (1 << TWEN)); TWI_ACK
-#define TWI_NAK		TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWIE)
+/**
+ * Nano Pinout
+ * A0 PC0/ADC0
+ * A1 PC1/ADC1
+ * A2 PC2/ADC2
+ * A3 PC3/ADC3
+ * A4 PC4/ADC4
+ * A5 PC5/ADC5
+ * A6 ADC6
+ * A7 ADC7
+ * D0 PD0/RX
+ * D1 PD1/TX
+ * D2 PD2/IND0
+ * D3 PD3/IND1
+ * D4 PD4/T0
+ * D5 PD5/T1
+ * D6 PD6/AIN0
+ * D7 PD7/AIN1
+ * D8 PB0/ICP
+ * D9 PB1/OC1
+ * D10 PB2/SS
+ * D11 PB3/MOSI
+ * D12 PB4/MISO
+ * D13 PB5/SCK
+ */
+
+
+#define TWI_ACK   TWCR = (1<<TWINT) | (1<<TWEA) | (1<<TWEN) | (1<<TWIE)
+#define TWI_NAK   TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWIE)
+#define TWI_RESET TWCR = (1<<TWINT) | (1<<TWEA) | (1<<TWSTO) | (1<<TWEN) | (1<<TWIE);
 
 static volatile uint8_t ireg=0;
 static volatile uint8_t bootloader=0;
 static volatile uint16_t dist_left=0;
 static volatile uint16_t dist_right=0;
-static volatile uint16_t dist_forward=0;
+static volatile uint16_t dist_forward1=0;
+static volatile uint16_t dist_forward2=0;
 static volatile uint16_t dist_backward=0;
-static volatile uint8_t start_dist_fwd=0;
+static volatile uint8_t start_dist_fwd1=0;
+static volatile uint8_t start_dist_fwd2=0;
 static volatile uint8_t start_dist_bwd=0;
 static volatile uint16_t voltage=0;
+static volatile uint16_t current=0;
+static volatile uint8_t pind_pre=0;
 
 ISR(TWI_vect)
 {
 	static int16_t tmp16=0;
 
-	switch (TWSR & 0xF8)
+	switch(TW_STATUS)
 	{  
-		case 0x60: // start write
+		case TW_SR_SLA_ACK: // start write
 			TWI_ACK;
 			ireg = 0;
 			break;
-		case 0x80: // write
+		case TW_SR_DATA_ACK: // write
 			switch(ireg) {
 				case 0x00: // register select
 					ireg = TWDR;
 
-					if (ireg == 0x05) start_dist_fwd=1;
+					if (ireg == 0x05) start_dist_fwd1=1;
 					if (ireg == 0x07) start_dist_bwd=1;
+					if (ireg == 0x0b) start_dist_fwd2=1;
 
 					ireg--; // because we do ireg++ below
 					TWI_ACK;
@@ -65,10 +112,10 @@ ISR(TWI_vect)
 				default:
 					TWI_NAK;
 			}
-			ireg++;
+			if (ireg < 0xff) ireg++;
 			break;
-		case 0xA8: // start read
-		case 0xB8: // read
+		case TW_ST_SLA_ACK: // start read
+		case TW_ST_DATA_ACK: // read
 			switch(ireg) {
 				case 0x01: // Distance left MSB
 					tmp16 = dist_left;
@@ -88,12 +135,12 @@ ISR(TWI_vect)
 					TWDR = tmp16;
 					TWI_ACK;
 					break;
-				case 0x05: // Distance forward MSB
-					tmp16 = dist_forward;
+				case 0x05: // Distance forward1 MSB
+					tmp16 = dist_forward1;
 					TWDR = tmp16>>8;
 					TWI_ACK;
 					break;
-				case 0x06: // Distance forward LSB
+				case 0x06: // Distance forward1 LSB
 					TWDR = tmp16;
 					TWI_ACK;
 					break;
@@ -115,12 +162,62 @@ ISR(TWI_vect)
 					TWDR = tmp16;
 					TWI_ACK;
 					break;
+				case 0x0B: // Distance forward2 MSB
+					tmp16 = dist_forward2;
+					TWDR = tmp16>>8;
+					TWI_ACK;
+					break;
+				case 0x0C: // Distance forward2 LSB
+					TWDR = tmp16;
+					TWI_ACK;
+					break;
+				case 0x0D: // Current MSB
+					tmp16 = current;
+					TWDR = tmp16>>8;
+					TWI_ACK;
+					break;
+				case 0x0E: // Current LSB
+					TWDR = tmp16;
+					TWI_ACK;
+					break;
+				case 0x15: // Distance forward1 MSB
+					tmp16 = dist_forward1;
+					TWDR = tmp16>>8;
+					TWI_ACK;
+					break;
+				case 0x16: // Distance forward1 LSB
+					TWDR = tmp16;
+					TWI_ACK;
+					break;
+				case 0x17: // Distance backward MSB
+					tmp16 = dist_backward;
+					TWDR = tmp16>>8;
+					TWI_ACK;
+					break;
+				case 0x18: // Distance backward LSB
+					TWDR = tmp16;
+					TWI_ACK;
+					break;
+				case 0x19: // Distance forward2 MSB
+					tmp16 = dist_forward2;
+					TWDR = tmp16>>8;
+					TWI_ACK;
+					break;
+				case 0x1A: // Distance forward2 LSB
+					TWDR = tmp16;
+					TWI_ACK;
+					break;
 				default:
 					TWDR = 0;
 					TWI_NAK;
 			}
 			ireg++;
 			break;
+		case TW_SR_STOP:
+			TWI_ACK;
+			break;
+		case TW_NO_INFO:
+			break;
 		default:
 			TWI_RESET;
 	}
@@ -131,8 +228,9 @@ uint16_t ReadChannel(uint8_t mux) {
 	uint8_t i;
 	uint16_t result;
 
-	ADCSRA = (1<<ADEN) | (1<<ADPS1) | (1<<ADPS0);    // Frequenzvorteiler 
-	// setzen auf 8 (1) und ADC aktivieren (1)
+	ADCSRA = (1<<ADEN) | (1<<ADPS2) | (1<<ADPS1) | (1<<ADPS0);    // Frequenzvorteiler
+	// setzen auf 128 (1) und ADC aktivieren (1)
+	// 16MHz/128=125kHz
 
 	ADMUX = mux;                      // Kanal waehlen
 	ADMUX |= (1<<REFS0);
@@ -176,6 +274,16 @@ static unsigned short get_voltage(void) {
 }
 
 
+/*
+ * zero offset: 0.5V
+ * sensitivity: 133mV/A
+ */
+static unsigned short get_current(void) {
+	double volt = ReadChannel(3)*5.0171; // mV
+	return (volt-517.78)/0.12656; // mA
+}
+
+
 ISR(INT0_vect) {
 	static uint16_t t_start=0;
 	uint16_t t_now = TCNT1;
@@ -186,9 +294,9 @@ ISR(INT0_vect) {
 		t_start = t_now;
 	} else {
 		t_diff = t_now - t_start;
-		dist_forward = t_diff*2.7586 + 0.5; // t [µs] / 580 = mm
+		dist_forward1 = t_diff*2.7586 + 0.5; // t [µs] / 580 = mm
 		// disable this interrupt
-		EIMSK |= (1 << INT0);
+		EIMSK &= ~(1 << INT0);
 	}
 }
 
@@ -205,8 +313,31 @@ ISR(INT1_vect) {
 		t_diff = t_now - t_start;
 		dist_backward = t_diff*2.7586 + 0.5; // t [µs] / 580 = mm
 		// disable this interrupt
-		EIMSK |= (1 << INT1);
+		EIMSK &= ~(1 << INT1);
+	}
+}
+
+
+ISR(PCINT2_vect) {
+	uint8_t pind_cur = PIND;
+
+	if ((pind_cur ^ pind_pre) & (1<<4)) { // PCINT20
+		static uint16_t t_start=0;
+		uint16_t t_now = TCNT1;
+		uint16_t t_diff;
+
+		if (bit_is_set(pind_cur, 4)) { // high level
+			// start timer
+			t_start = t_now;
+		} else {
+			t_diff = t_now - t_start;
+			dist_forward2 = t_diff*2.7586 + 0.5; // t [µs] / 580 = mm
+			// disable this interrupt
+			PCMSK2 &= ~(1 << PCINT20);
+		}
 	}
+
+	pind_pre = pind_cur;
 }
 
 
@@ -217,7 +348,7 @@ int main(void) {
 
 	// I2C
 	TWAR = 0x52;
-	TWI_RESET;
+	TWI_ACK;
 
 	// Timer 1: Normal mode, Top: 0xffff, Prescaler: F_CPU/256=62500Hz
 	TCCR1A = 0x0;
@@ -225,8 +356,9 @@ int main(void) {
 
 	// External Interrupts
 	EICRA = (1 << ISC10) | (1 << ISC00);
+	PCICR = (1 << PCIE2);
 
-	printf("\r\nStart\r\n");
+	printf_P(PSTR("\r\nStart\r\n"));
 
 	set_sleep_mode(SLEEP_MODE_IDLE);
 	sei();
@@ -241,20 +373,24 @@ int main(void) {
 			case 0x09: // voltage
 				voltage = get_voltage();
 				break;
+			case 0x0d: // current
+				current = get_current();
+				break;
 			case 0xff: // Magic reg that starts the bootloader
 				if (bootloader == 0xa5) {
 					cli();
-					{
-						void (*start)(void) = (void*)0x1800;
-						start();
-					}
+					// write mark to first area in eeprom
+					eeprom_write_byte((uint8_t*)0, 123);
+					eeprom_busy_wait();
+					// Use watchdog to restart
+					wdt_enable(WDTO_15MS);
 				}
 				break;
 		}
 
-		if (start_dist_fwd) {
-			start_dist_fwd = 0;
-			dist_forward = 0;
+		if (start_dist_fwd1) {
+			start_dist_fwd1 = 0;
+			dist_forward1 = 0;
 
 			DDRD |= (1 << 2);
 			PORTD |= (1 << 2);
@@ -262,6 +398,7 @@ int main(void) {
 			PORTD &= ~(1 << 2);
 			DDRD &= ~(1 << 2);
 			// wait for interrupt
+			EIFR &= (1 << INTF0); // clear old interrupt before enabling
 			EIMSK |= (1 << INT0);
 		}
 		if (start_dist_bwd) {
@@ -274,8 +411,23 @@ int main(void) {
 			PORTD &= ~(1 << 3);
 			DDRD &= ~(1 << 3);
 			// wait for interrupt
+			EIFR &= (1 << INTF1); // clear old interrupt before enabling
 			EIMSK |= (1 << INT1);
 		}
+		if (start_dist_fwd2) {
+			start_dist_fwd2 = 0;
+			dist_forward2 = 0;
+
+			// PD4 = PCINT20
+			DDRD |= (1 << 4);
+			PORTD |= (1 << 4);
+			_delay_us(10);
+			PORTD &= ~(1 << 4);
+			DDRD &= ~(1 << 4);
+			// wait for interrupt
+			pind_pre = PIND;
+			PCMSK2 |= (1 << PCINT20);
+		}
 
 		sleep_mode();
 	}