X-Git-Url: https://defiant.homedns.org/gitweb/?p=ros_wild_thumper.git;a=blobdiff_plain;f=avr%2Fnano%2Fmain.c;h=07e1871420dcbc433671656420ac30f6182d8189;hp=78e85316980ef5d067b43a55e2d7c6b89c0f8529;hb=8bf6f432e200f4d3fa494081837915b15015ab65;hpb=cba57a46f758cff1cb49df0b337eac82ab4453f3

diff --git a/avr/nano/main.c b/avr/nano/main.c
index 78e8531..07e1871 100644
--- a/avr/nano/main.c
+++ b/avr/nano/main.c
@@ -28,6 +28,7 @@
  * 0x0C Distance forward2 LSB
  * 0x0D Current MSB
  * 0x0E Current LSB
+ * 0x0F Manipulator 12V
  *
  * 0x15 Distance forward1 MSB (read only)
  * 0x16 Distance forward1 LSB (read only)
@@ -40,6 +41,33 @@
  */
 
 
+/**
+ * Nano Pinout
+ * A0 PC0/ADC0
+ * A1 PC1/ADC1
+ * A2 PC2/ADC2
+ * A3 PC3/ADC3
+ * A4 PC4/ADC4
+ * A5 PC5/ADC5
+ * A6 ADC6
+ * A7 ADC7
+ * D0 PD0/RX
+ * D1 PD1/TX
+ * D2 PD2/IND0 dist_fwd1
+ * D3 PD3/IND1 dist_bwd
+ * D4 PD4/T0 dist_fwd2
+ * D5 PD5/T1 Manipulator 12V
+ * D6 PD6/AIN0
+ * D7 PD7/AIN1
+ * D8 PB0/ICP
+ * D9 PB1/OC1
+ * D10 PB2/SS
+ * D11 PB3/MOSI
+ * D12 PB4/MISO
+ * D13 PB5/SCK
+ */
+
+
 #define TWI_ACK   TWCR = (1<<TWINT) | (1<<TWEA) | (1<<TWEN) | (1<<TWIE)
 #define TWI_NAK   TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWIE)
 #define TWI_RESET TWCR = (1<<TWINT) | (1<<TWEA) | (1<<TWSTO) | (1<<TWEN) | (1<<TWIE);
@@ -74,12 +102,17 @@ ISR(TWI_vect)
 					ireg = TWDR;
 
 					if (ireg == 0x05) start_dist_fwd1=1;
-					if (ireg == 0x07) start_dist_bwd=1;
-					if (ireg == 0x0b) start_dist_fwd2=1;
+					else if (ireg == 0x07) start_dist_bwd=1;
+					else if (ireg == 0x0b) start_dist_fwd2=1;
 
 					ireg--; // because we do ireg++ below
 					TWI_ACK;
 					break;
+				case 0x0f: // Manipulator 12V
+					if (TWDR) PORTD |= (1 << 5);
+					else PORTD &= ~(1 << 5);
+					TWI_ACK;
+					break;
 				case 0xff: // bootloader
 					bootloader = TWDR;
 				default:
@@ -189,6 +222,8 @@ ISR(TWI_vect)
 		case TW_SR_STOP:
 			TWI_ACK;
 			break;
+		case TW_NO_INFO:
+			break;
 		default:
 			TWI_RESET;
 	}
@@ -199,8 +234,9 @@ uint16_t ReadChannel(uint8_t mux) {
 	uint8_t i;
 	uint16_t result;
 
-	ADCSRA = (1<<ADEN) | (1<<ADPS1) | (1<<ADPS0);    // Frequenzvorteiler 
-	// setzen auf 8 (1) und ADC aktivieren (1)
+	ADCSRA = (1<<ADEN) | (1<<ADPS2) | (1<<ADPS1) | (1<<ADPS0);    // Frequenzvorteiler
+	// setzen auf 128 (1) und ADC aktivieren (1)
+	// 16MHz/128=125kHz
 
 	ADMUX = mux;                      // Kanal waehlen
 	ADMUX |= (1<<REFS0);
@@ -316,6 +352,9 @@ int main(void) {
 	setup_uart(9600);
 	uart_setup_stdout();
 
+	DDRD = (1 << 5);
+	PORTD = 0x0;
+
 	// I2C
 	TWAR = 0x52;
 	TWI_ACK;