avr motor_ctrl: watchdog configuration
[ros_wild_thumper.git] / avr / motor_ctrl / main.c
index f7c9f0a..a4c984d 100644 (file)
@@ -96,6 +96,8 @@
  * 0xA0 Reset reason
  * 0xA1 Error status
  * 0xA2 count test
+ * 0xA3 last i2c status before boot
+ * 0xA4 Watchdog enable
  * free
  * 0xff Bootloader
  */
@@ -187,6 +189,8 @@ static volatile uint8_t aft_handicap=0;
 static volatile uint8_t error_state=0;
 static volatile uint8_t last_man_update_count=0;
 static volatile uint8_t last_i2c_status = 0;
+static uint8_t last_i2c_status_boot = 0;
+static volatile uint8_t watchdog_enable = 0;
 
 ISR(TWI_vect)
 {
@@ -383,6 +387,10 @@ ISR(TWI_vect)
                                        cmd_vel.bUpdate = 1;
                                        TWI_ACK;
                                        break;
+                               case 0xA4: // Watchdog enable
+                                       watchdog_enable = TWDR;
+                                       TWI_ACK;
+                                       break;
                                case 0xff: // bootloader
                                        bootloader = TWDR;
                                default:
@@ -619,6 +627,12 @@ ISR(TWI_vect)
                                case 0xA2: // count test
                                        TWDR = count_test;
                                        TWI_ACK;
+                               case 0xA3: // last i2c status before boot
+                                       TWDR = last_i2c_status_boot;
+                                       TWI_ACK;
+                               case 0xA4: // Watchdog enable
+                                       TWDR = watchdog_enable;
+                                       TWI_ACK;
                                default:
                                        TWDR = 0;
                                        TWI_NAK;
@@ -633,6 +647,10 @@ ISR(TWI_vect)
                default:
                        TWI_RESET;
        }
+
+       if (watchdog_enable == 2) {
+               wdt_reset();
+       }
 }
 
 
@@ -1090,6 +1108,8 @@ int main(void) {
 
        printf_P(PSTR("\r\nStart\r\n"));
 
+       last_i2c_status_boot = eeprom_read_byte((uint8_t*)1);
+
        set_sleep_mode(SLEEP_MODE_IDLE);
        // Enable Timer 1 Overflow Interrupt
        TIMSK = (1 << TOIE1);
@@ -1097,6 +1117,15 @@ int main(void) {
 
        while(1) {
                switch(ireg) {
+                       case 0xA4: // Watchdog enable
+                               if (watchdog_enable == 1) {
+                                       wdt_enable(WDTO_2S);
+                                       watchdog_enable = 2;
+                               } else if (watchdog_enable == 0) {
+                                       wdt_disable();
+                                       watchdog_enable = 3;
+                               }
+                               break;
                        case 0xff: // Magic reg that starts the bootloader
                                if (bootloader == 0xa5) {
                                        cli();
@@ -1161,6 +1190,8 @@ int main(void) {
                                cmd_vel.bUpdate = 1;
                                if (last_man_update_count == 100) {
                                        printf_P(PSTR("I2C State: 0x%x\r\n"), last_i2c_status);
+                                       eeprom_write_byte((uint8_t*)1, last_i2c_status);
+                                       eeprom_busy_wait();
                                }
                                last_man_update_count = I2C_TIMEOUT_DISABLE;
                        }