#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/sleep.h>
+#include <util/twi.h>
+#include <avr/eeprom.h>
+#include <avr/wdt.h>
+#include <avr/pgmspace.h>
#include "uart.h"
/*
* 0xA0 Reset reason
* 0xA1 Error status
* 0xA2 count test
+ * 0xA3 last i2c status before boot
+ * 0xA4 Watchdog enable
* free
* 0xff Bootloader
*/
-#define KP 0.09
-#define KI 0.07
+#define KP 0.062
+#define KI 0.12
#define KD 0.0
#define PID_T 0.01
// wheel diameter=12cm, encoder=48cpr, gear ratio=1:47
// STEP_PER_M = 48*47/(d*pi)
// Left real diameter: 0.12808, Right real diameter: 0.121
-#define STEP_PER_M 5770.8
+#define STEP_PER_M 5573.0
#define STEP_PER_M_LEFT (STEP_PER_M)
#define STEP_PER_M_RIGHT (STEP_PER_M)
#define WHEEL_DIST 0.39912 // Measured: 0.252
#define PWM_BREAK INT16_MIN
#define STALL_LIMIT 140000
+#define I2C_TIMEOUT_DISABLE 255
-#define TWI_ACK TWCR = (1<<TWEA) | (1<<TWINT) | (1<<TWEN) | (1<<TWIE)
-#define TWI_RESET TWCR &= ~((1 << TWSTO) | (1 << TWEN)); TWI_ACK
+#define TWI_ACK TWCR = (1<<TWINT) | (1<<TWEA) | (1<<TWEN) | (1<<TWIE)
#define TWI_NAK TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWIE)
+#define TWI_RESET TWCR = (1<<TWINT) | (1<<TWEA) | (1<<TWSTO) | (1<<TWEN) | (1<<TWIE);
#define ENABLE_PWM_MOTOR1 TCCR1A |= (1 << COM1A1)
#define ENABLE_PWM_MOTOR2 TCCR1A |= (1 << COM1B1)
#define ENABLE_PWM_MOTOR3 TCCR2 |= (1 << COM21);
static volatile uint8_t front_handicap=0;
static volatile uint8_t aft_handicap=0;
static volatile uint8_t error_state=0;
+static volatile uint8_t last_man_update_count=0;
+static volatile uint8_t last_i2c_status = 0;
+static uint8_t last_i2c_status_boot = 0;
+static volatile uint8_t watchdog_enable = 0;
ISR(TWI_vect)
{
static ufloat_t tmp_speed;
static ufloat_t tmp_angle;
- switch (TWSR & 0xF8)
+ last_i2c_status = TW_STATUS;
+ switch(TW_STATUS)
{
- case 0x60: // start write
+ case TW_SR_SLA_ACK: // start write
TWI_ACK;
ireg = 0;
break;
- case 0x80: // write
+ case TW_SR_DATA_ACK: // write
switch(ireg) {
case 0x00: // register select
ireg = TWDR;
tmp_angle.i = tmp_angle.i << 8 | TWDR;
cmd_vel.angle = tmp_angle.f;
cmd_vel.bUpdate = 1;
+ last_man_update_count = 0;
TWI_ACK;
break;
case 0x90: // Motor 1 switch
cmd_vel.bUpdate = 1;
TWI_ACK;
break;
+ case 0xA4: // Watchdog enable
+ watchdog_enable = TWDR;
+ TWI_ACK;
+ break;
case 0xff: // bootloader
bootloader = TWDR;
default:
TWI_NAK;
}
- ireg++;
+ if (ireg < 0xff) ireg++;
break;
- case 0xA8: // start read
- case 0xB8: // read
+ case TW_ST_SLA_ACK: // start read
+ case TW_ST_DATA_ACK: // read
switch(ireg) {
case 0x02: // Motor 1 PWM
TWDR = OCR1A;
case 0xA2: // count test
TWDR = count_test;
TWI_ACK;
+ case 0xA3: // last i2c status before boot
+ TWDR = last_i2c_status_boot;
+ TWI_ACK;
+ case 0xA4: // Watchdog enable
+ TWDR = watchdog_enable;
+ TWI_ACK;
default:
TWDR = 0;
TWI_NAK;
}
ireg++;
break;
+ case TW_SR_STOP:
+ TWI_ACK;
+ break;
+ case TW_NO_INFO:
+ break;
default:
TWI_RESET;
}
+
+ if (watchdog_enable == 2) {
+ wdt_reset();
+ }
}
speed1_wish_old = speed1_wish;
}
- if (speed1_wish == 0) {
+ uint8_t dir_change = (speed1_wish > 0 && speed1 < 0) || (speed1_wish < 0 && speed1 > 0); // Prevent dangerous immediate engine reverse
+ if (speed1_wish == 0 || dir_change) {
motor1 = 0;
eold1 = 0;
error_state &= ~(1<<4);
speed2_wish_old = speed2_wish;
}
- if (speed2_wish == 0) {
+ uint8_t dir_change = (speed2_wish > 0 && speed2 < 0) || (speed2_wish < 0 && speed2 > 0); // Prevent dangerous immediate engine reverse
+ if (speed2_wish == 0 || dir_change) {
motor2 = 0;
eold2 = 0;
error_state &= ~(1<<5);
speed3_wish_old = speed3_wish;
}
- if (speed3_wish == 0) {
+ uint8_t dir_change = (speed3_wish > 0 && speed3 < 0) || (speed3_wish < 0 && speed3 > 0); // Prevent dangerous immediate engine reverse
+ if (speed3_wish == 0 || dir_change) {
motor3 = 0;
eold3 = 0;
error_state &= ~(1<<6);
speed4_wish_old = speed4_wish;
}
- if (speed4_wish == 0) {
+ uint8_t dir_change = (speed4_wish > 0 && speed4 < 0) || (speed4_wish < 0 && speed4 > 0); // Prevent dangerous immediate engine reverse
+ if (speed4_wish == 0 || dir_change) {
motor4 = 0;
eold4 = 0;
error_state &= ~(1<<7);
// I2C
TWAR = 0x50;
- TWI_RESET;
+ TWI_ACK;
// Motor 1 & 2
// Also used for PWM frequency TIMER1_FREQ (F_CPU/256)
TCCR0 = (1 << WGM01) | (1 << WGM00) | (1 << CS00);
OCR0 = 0;
- printf("\r\nStart\r\n");
+ printf_P(PSTR("\r\nStart\r\n"));
+
+ last_i2c_status_boot = eeprom_read_byte((uint8_t*)1);
set_sleep_mode(SLEEP_MODE_IDLE);
// Enable Timer 1 Overflow Interrupt
while(1) {
switch(ireg) {
+ case 0xA4: // Watchdog enable
+ if (watchdog_enable == 1) {
+ wdt_enable(WDTO_2S);
+ watchdog_enable = 2;
+ } else if (watchdog_enable == 0) {
+ wdt_disable();
+ watchdog_enable = 3;
+ }
+ break;
case 0xff: // Magic reg that starts the bootloader
if (bootloader == 0xa5) {
cli();
- {
- void (*start)(void) = (void*)0x1800;
- start();
- }
+ // write mark to first area in eeprom
+ eeprom_write_byte((uint8_t*)0, 123);
+ eeprom_busy_wait();
+ // Use watchdog to restart
+ wdt_enable(WDTO_15MS);
}
break;
}
update_pid();
update_motor();
count_test++;
+ if (last_man_update_count != I2C_TIMEOUT_DISABLE) last_man_update_count++;
+
+ if (last_man_update_count >= 100) {
+ // ~1s without a new i2c command
+ cmd_vel.speed = 0;
+ cmd_vel.angle = 0;
+ cmd_vel.bUpdate = 1;
+ if (last_man_update_count == 100) {
+ printf_P(PSTR("I2C State: 0x%x\r\n"), last_i2c_status);
+ eeprom_write_byte((uint8_t*)1, last_i2c_status);
+ eeprom_busy_wait();
+ }
+ last_man_update_count = I2C_TIMEOUT_DISABLE;
+ }
}
sleep_mode();
projects / ros_wild_thumper.git / blobdiff